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[PULL 37/60] disas: Change type of disassemble_info.target_info to point
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From: |
Alistair Francis |
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Subject: |
[PULL 37/60] disas: Change type of disassemble_info.target_info to pointer |
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Date: |
Wed, 14 Jun 2023 11:19:54 +1000 |
From: Weiwei Li <liweiwei@iscas.ac.cn>
Use pointer to pass more information of target to disasembler,
such as pass cpu.cfg related information in following commits.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230523093539.203909-2-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
include/disas/dis-asm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
index 2f6f91c2ee..2324f6b1a4 100644
--- a/include/disas/dis-asm.h
+++ b/include/disas/dis-asm.h
@@ -397,7 +397,7 @@ typedef struct disassemble_info {
char * disassembler_options;
/* Field intended to be used by targets in any way they deem suitable. */
- int64_t target_info;
+ void *target_info;
/* Options for Capstone disassembly. */
int cap_arch;
--
2.40.1
- [PULL 27/60] hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro, (continued)
- [PULL 27/60] hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro, Alistair Francis, 2023/06/13
- [PULL 28/60] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition, Alistair Francis, 2023/06/13
- [PULL 29/60] hw/riscv/opentitan: Explicit machine type definition, Alistair Francis, 2023/06/13
- [PULL 30/60] hw/riscv/opentitan: Correct OpenTitanState parent type/size, Alistair Francis, 2023/06/13
- [PULL 31/60] hw/riscv: qemu crash when NUMA nodes exceed available CPUs, Alistair Francis, 2023/06/13
- [PULL 32/60] target/riscv: Fix pointer mask transformation for vector address, Alistair Francis, 2023/06/13
- [PULL 34/60] target/riscv: smstateen check for fcsr, Alistair Francis, 2023/06/13
- [PULL 39/60] target/riscv: Pass RISCVCPUConfig as target_info to disassemble_info, Alistair Francis, 2023/06/13
- [PULL 33/60] target/riscv: Update cur_pmmask/base when xl changes, Alistair Francis, 2023/06/13
- [PULL 36/60] target/riscv: smstateen knobs, Alistair Francis, 2023/06/13
- [PULL 37/60] disas: Change type of disassemble_info.target_info to pointer,
Alistair Francis <=
- [PULL 35/60] target/riscv: Reuse tb->flags.FS, Alistair Francis, 2023/06/13
- [PULL 38/60] target/riscv: Split RISCVCPUConfig declarations from cpu.h into cpu_cfg.h, Alistair Francis, 2023/06/13
- [PULL 40/60] disas/riscv.c: Support disas for Zcm* extensions, Alistair Francis, 2023/06/13
- [PULL 43/60] disas/riscv.c: Fix lines with over 80 characters, Alistair Francis, 2023/06/13
- [PULL 41/60] disas/riscv.c: Support disas for Z*inx extensions, Alistair Francis, 2023/06/13
- [PULL 42/60] disas/riscv.c: Remove unused decomp_rv32/64 value for vector instructions, Alistair Francis, 2023/06/13
- [PULL 45/60] target/riscv: Fix target address to update badaddr, Alistair Francis, 2023/06/13
- [PULL 44/60] disas/riscv.c: Remove redundant parentheses, Alistair Francis, 2023/06/13
- [PULL 46/60] target/riscv: Introduce cur_insn_len into DisasContext, Alistair Francis, 2023/06/13
- [PULL 47/60] target/riscv: Change gen_goto_tb to work on displacements, Alistair Francis, 2023/06/13