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[PULL 59/60] target/riscv: Smepmp: Return error when access permission n
From: |
Alistair Francis |
Subject: |
[PULL 59/60] target/riscv: Smepmp: Return error when access permission not allowed in PMP |
Date: |
Wed, 14 Jun 2023 11:20:16 +1000 |
From: Himanshu Chauhan <hchauhan@ventanamicro.com>
On an address match, skip checking for default permissions and return error
based on access defined in PMP configuration.
v3 Changes:
o Removed explicit return of boolean value from comparision
of priv/allowed_priv
v2 Changes:
o Removed goto to return in place when address matches
o Call pmp_hart_has_privs_default at the end of the loop
Fixes: 90b1fafce06 ("target/riscv: Smepmp: Skip applying default rules when
address matches")
Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-Id: <20230605164548.715336-1-hchauhan@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/pmp.c | 10 ++--------
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 418738afd8..9d8db493e6 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -291,7 +291,6 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
pmp_priv_t *allowed_privs, target_ulong mode)
{
int i = 0;
- bool ret = false;
int pmp_size = 0;
target_ulong s = 0;
target_ulong e = 0;
@@ -435,17 +434,12 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
* defined with PMP must be used. We shouldn't fallback on
* finding default privileges.
*/
- ret = true;
- break;
+ return (privs & *allowed_privs) == privs;
}
}
/* No rule matched */
- if (!ret) {
- ret = pmp_hart_has_privs_default(env, privs, allowed_privs, mode);
- }
-
- return ret;
+ return pmp_hart_has_privs_default(env, privs, allowed_privs, mode);
}
/*
--
2.40.1
- [PULL 47/60] target/riscv: Change gen_goto_tb to work on displacements, (continued)
- [PULL 47/60] target/riscv: Change gen_goto_tb to work on displacements, Alistair Francis, 2023/06/13
- [PULL 50/60] target/riscv: Enable PC-relative translation, Alistair Francis, 2023/06/13
- [PULL 52/60] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none", Alistair Francis, 2023/06/13
- [PULL 53/60] riscv/virt: Support using pflash via -blockdev option, Alistair Francis, 2023/06/13
- [PULL 55/60] util/log: Add vector registers to log, Alistair Francis, 2023/06/13
- [PULL 56/60] target/riscv: Fix initialized value for cur_pmmask, Alistair Francis, 2023/06/13
- [PULL 54/60] docs/system: riscv: Add pflash usage details, Alistair Francis, 2023/06/13
- [PULL 48/60] target/riscv: Change gen_set_pc_imm to gen_update_pc, Alistair Francis, 2023/06/13
- [PULL 49/60] target/riscv: Use true diff for gen_pc_plus_diff, Alistair Francis, 2023/06/13
- [PULL 58/60] target/riscv/vector_helper.c: Remove the check for extra tail elements, Alistair Francis, 2023/06/13
- [PULL 59/60] target/riscv: Smepmp: Return error when access permission not allowed in PMP,
Alistair Francis <=
- [PULL 51/60] target/riscv: Remove pc_succ_insn from DisasContext, Alistair Francis, 2023/06/13
- [PULL 57/60] target/riscv/vector_helper.c: clean up reference of MTYPE, Alistair Francis, 2023/06/13
- [PULL 60/60] hw/intc: If mmsiaddrcfgh.L == 1, smsiaddrcfg and smsiaddrcfgh are read-only., Alistair Francis, 2023/06/13
- Re: [PULL 00/60] riscv-to-apply queue, Richard Henderson, 2023/06/14
- Re: [PULL 00/60] riscv-to-apply queue, Michael Tokarev, 2023/06/14