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Re: [Qemu-ppc] [PATCH 4/6] openpic: don't crash on a register access wit
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From: |
Alexander Graf |
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Subject: |
Re: [Qemu-ppc] [PATCH 4/6] openpic: don't crash on a register access without a CPU context |
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Date: |
Fri, 14 Dec 2012 19:20:24 +0100 |
On 14.12.2012, at 19:18, Scott Wood wrote:
> On 12/14/2012 06:35:12 AM, Alexander Graf wrote:
>> On 14.12.2012, at 03:12, Scott Wood wrote:
>> > If we access a register via the QEMU memory inspection commands (e.g.
>> > "xp") rather than from guest code, we won't have a CPU context.
>> > Gracefully fail to access the register in that case, rather than
>> > crashing.
>> Can't we set cpu_single_env in the debug memory access case? I'm not sure
>> this is the only device with that problem, and by always having
>> cpu_single_env available we would completely get rid of the whole bug
>> category.
>
> Which CPU would you pick?
The boot CPU.
Alex
[Qemu-ppc] [PATCH 5/6] openpic: BRR1 is not a CPU-specific register., Scott Wood, 2012/12/13
[Qemu-ppc] [PATCH 2/6] openpic: remove pcsr (CPU sensitivity register), Scott Wood, 2012/12/13
[Qemu-ppc] [PATCH 6/6] openpic: s/opp->nb_irqs -1/opp->nb_cpus - 1/, Scott Wood, 2012/12/13
[Qemu-ppc] [PATCH 3/6] openpic: support large vectors on FSL mpic, Scott Wood, 2012/12/13
Re: [Qemu-ppc] [PATCH 0/6] openpic: first batch of cleanups and minor fixes, Alexander Graf, 2012/12/14