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Re: [Tinycc-devel] RISC-V support
From: |
Michael Matz |
Subject: |
Re: [Tinycc-devel] RISC-V support |
Date: |
Mon, 2 Sep 2019 19:53:12 +0000 (UTC) |
User-agent: |
Alpine 2.21 (LSU 202 2017-01-01) |
Hello,
On Mon, 2 Sep 2019, Christian Jullien wrote:
> Question, what RISC-V flavor(s) do you support, i.e. what is the minimal
> RSIC-V subset do you require? If I've read correctly, RISC-V is a
> modular architecture with optional features (hard float, MMU..)
So, it's using the RV64IMFD subsets. When the sources don't contain float
or double arithmetic the FD subsets aren't used, but I do rely on the
existence of M for any multiplications and divisions (by non-power-of-2).
Ciao,
Michael.
>
> C.
>
> -----Original Message-----
> From: Tinycc-devel [mailto:tinycc-devel-bounces+eligis=address@hidden] On
> Behalf Of Michael Matz
> Sent: Monday, September 02, 2019 00:42
> To: address@hidden
> Subject: [Tinycc-devel] RISC-V support
>
> Hi,
>
> On Fri, 21 Jun 2019, Larry Doolittle wrote:
>
> >> Every compiler has its own benefits. That's why tcc still exists
> >> in particular. :)
> >
> > Right. Wake me when clang can target MSP430 and microblaze.
> >
> > Adding RISC-V support to tcc would be _extremely_ interesting.
>
> Pushed to mob. Tested on openSUSE and Debian riscv64 distros, but only
> via a qemu, not on real hardware. The thing is enough to compile itself
> and the full testsuite, so it's reasonably complete (e.g. the fancy
> argument passing and long double support is there). No compressed code is
> generated, inline asm isn't supported. Given the limitations of the TCC
> code generator the quality of the generated code is on par with the other
> architectures (i.e. horrible :-) ).
>
> I did my best to test the other targets, but only checked armhf, aarch64,
> i386 and x86-64 on linux; i.e. the windows backends weren't checked.
>
> Still, have fun.
>
>
> Ciao,
> Michael.
>
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Re: [Tinycc-devel] RISC-V support, Giovanni Mascellani, 2019/09/02