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[Qemu-devel] [PULL 24/28] arm: helper: rename get_phys_addr_mpu
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 24/28] arm: helper: rename get_phys_addr_mpu |
Date: |
Mon, 15 Jun 2015 18:24:54 +0100 |
From: Peter Crosthwaite <address@hidden>
This get_phys_addr is really for pmsav5. Rename it accordingly.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f038a03a..00509b1 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -5759,9 +5759,9 @@ do_fault:
return true;
}
-static bool get_phys_addr_mpu(CPUARMState *env, uint32_t address,
- int access_type, ARMMMUIdx mmu_idx,
- hwaddr *phys_ptr, int *prot, uint32_t *fsr)
+static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address,
+ int access_type, ARMMMUIdx mmu_idx,
+ hwaddr *phys_ptr, int *prot, uint32_t *fsr)
{
int n;
uint32_t mask;
@@ -5902,8 +5902,8 @@ static inline bool get_phys_addr(CPUARMState *env,
target_ulong address,
if (arm_feature(env, ARM_FEATURE_MPU)) {
*page_size = TARGET_PAGE_SIZE;
- return get_phys_addr_mpu(env, address, access_type, mmu_idx, phys_ptr,
- prot, fsr);
+ return get_phys_addr_pmsav5(env, address, access_type, mmu_idx,
+ phys_ptr, prot, fsr);
}
if (regime_using_lpae_format(env, mmu_idx)) {
--
1.9.1
- [Qemu-devel] [PULL 00/28] target-arm queue, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 27/28] ACPI: Add definitions for the SPCR table, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 03/28] arm_gic: gic_update should always update all cores, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 28/28] hw/arm/virt-acpi-build: Add SPCR table, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 26/28] target-arm: Correct "preferred return address" for cpreg access exceptions, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 25/28] hw/arm/boot: fix rom_reset notifier registration order, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 24/28] arm: helper: rename get_phys_addr_mpu,
Peter Maydell <=
- [Qemu-devel] [PULL 22/28] arm: Implement uniprocessor with MP config, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 23/28] arm: Add has-mpu property, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 19/28] arm: Don't add v7mp registers in MPU systems, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 20/28] arm: helper: Factor out CP regs common to [pv]msa, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 18/28] arm: Do not define TLBTR in PMSA systems, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 16/28] hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOps, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 15/28] hw/arm/pxa2xx: Convert pxa2xx-ssp to VMState, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 12/28] hw/arm/pxa2xx: Mark coprocessor registers as ARM_CP_IO, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 08/28] target-arm: Fix REVIDR reset value, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 09/28] target-arm: add AArch32 MIDR aliases in ARMv8, Peter Maydell, 2015/06/15