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[Qemu-devel] [PULL 22/28] arm: Implement uniprocessor with MP config
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 22/28] arm: Implement uniprocessor with MP config |
Date: |
Mon, 15 Jun 2015 18:24:52 +0100 |
From: Peter Crosthwaite <address@hidden>
Add a boolean for indicating uniprocessors with MP extensions. This
drives the U bit in MPIDR. Prepares support for Cortex-R5.
Signed-off-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu-qom.h | 3 +++
target-arm/helper.c | 6 ++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 24a4cfb..57b4a12 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -116,6 +116,9 @@ typedef struct ARMCPU {
/* KVM init features for this CPU */
uint32_t kvm_init_features[7];
+ /* Uniprocessor system with MP extensions */
+ bool mp_is_up;
+
/* The instance init functions for implementation-specific subclasses
* set these fields to specify the implementation-dependent values of
* various constant registers and reset values of non-constant
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f51dece..f038a03a 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2075,9 +2075,11 @@ static uint64_t mpidr_read(CPUARMState *env, const
ARMCPRegInfo *ri)
mpidr |= (1U << 31);
/* Cores which are uniprocessor (non-coherent)
* but still implement the MP extensions set
- * bit 30. (For instance, A9UP.) However we do
- * not currently model any of those cores.
+ * bit 30. (For instance, Cortex-R5).
*/
+ if (cpu->mp_is_up) {
+ mpidr |= (1u << 30);
+ }
}
return mpidr;
}
--
1.9.1
- [Qemu-devel] [PULL 00/28] target-arm queue, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 27/28] ACPI: Add definitions for the SPCR table, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 03/28] arm_gic: gic_update should always update all cores, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 28/28] hw/arm/virt-acpi-build: Add SPCR table, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 26/28] target-arm: Correct "preferred return address" for cpreg access exceptions, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 25/28] hw/arm/boot: fix rom_reset notifier registration order, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 24/28] arm: helper: rename get_phys_addr_mpu, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 22/28] arm: Implement uniprocessor with MP config,
Peter Maydell <=
- [Qemu-devel] [PULL 23/28] arm: Add has-mpu property, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 19/28] arm: Don't add v7mp registers in MPU systems, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 20/28] arm: helper: Factor out CP regs common to [pv]msa, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 18/28] arm: Do not define TLBTR in PMSA systems, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 16/28] hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOps, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 15/28] hw/arm/pxa2xx: Convert pxa2xx-ssp to VMState, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 12/28] hw/arm/pxa2xx: Mark coprocessor registers as ARM_CP_IO, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 08/28] target-arm: Fix REVIDR reset value, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 09/28] target-arm: add AArch32 MIDR aliases in ARMv8, Peter Maydell, 2015/06/15
- [Qemu-devel] [PULL 05/28] target-arm/cpu.h: remove pending_exception, Peter Maydell, 2015/06/15